News
BAC 63F81
Friday 23 August 2024, by // Peripherals
DMC 63F41
Friday 23 August 2024, by // Peripherals
DMC 63F41 is a level-1 direct mapped cache controller. It is not configurable.
Characteristics: full speed; direct mapped; write through; 64 KB of synchronous RAM; usable in SMP configuration as it contains a cache invalidation subsystem.
PTM
Monday 17 June 2024, by // Programming examples
``` ORG $FFFFFF00 LDMD #$31 LDS #$FFFE0000 LDU #$FFFDF000 * Direct mode: address is built with DS:DP:8 bits offset LDDS #$FFFE LDDP #$F0 * Configure PIA0 (PIA0(0) <= 1). * PIA0(0) is connected to PTM1.G(3) LDA #%00000000 STA <PIA0+1 LDA #%00000001 STA <PIA0 LDA #%00000100 STA (…)
Read more »SPI
Monday 17 June 2024, by // Programming examples
``` ORG $FFFFFF00 LDMD #$31 LDS #$FFFF0000 LDU #$FFFEF000 * Direct mode: address is built with DS:DP:8 bits offset LDDS #$FFFF LDDP #$00 * SPI0 * Internal registers: * SPI0+0: data register * SPI0+1: control register
* SPI0 control register * Configure divisor (1’000’000) LDA #%00000001 STA TX_EMPTY = 1 * TST Z=0 => TX_EMPTY = 1 * (…)
TWI
Friday 14 June 2024, by // Programming examples
Example ``` ORG $FFFF0000 LDMD #$31 LDS #$FFFE0000 LDU #$FFFDF000 * Direct mode: address is built with DS:DP:8 bits offset * i2c controller is at $FFFEB000-$FFFEB003 LDDS #$FFFE LDDP #$B0 * TWI0 control register LDA #%00000000 ; polling mode STA <TWI0+2 * Set TWI0 clock divisor LDD #0 STD <TWI0+4 * Set slave (…)
Read more »ROM initialization
Friday 14 June 2024, by // Tools
System on chip contains 64 Kbytes of read only memory between addresses $FFFF0000 and $FFFFFFFF. This memory is created with RAM blocks and initialized in a file created by memblcks.rpl tool.
memblcks.rpl is a program written in RPL/2 and takes a SREC file generated by A09 assembler in 32 bits mode. It splits S-records into bits arrays to create a usable 27F512.vhd file.
This tool is (…)
RAM 61F512
Friday 14 June 2024, by // Peripherals
ROM 27F512
Friday 14 June 2024, by // Peripherals
System on chip contains a 64 Kbytes ROM between $FFFF0000 and $FFFFFFFF. Memory is created with RAM blocks in a read only configuration.
This ROM is hardcoded and initialized with memblcks.rpl.