63F09 is a modern CPU full compatible with old MC6809. It presents only one difference with HD6309, it don’t have a 0 register.

If the first instruction after reset is LDMD, CPU can enter in 6309 mode (16 bits) or 63F09 mode (32 bits) with or without FPU.

In 63F09 mode, there are a lot of new instructions. For example:

• hardwired multiplications and division (until 64 bits);
• 32 and 64 bits arithmetic;
• FPU that handle simple and double precision floats;
• 32 bits addresses (36 bits with MMU)...

Twenty-seven interrupt requests are available:

• NMI
• IRQ
• FIRQ
• twenty-four EIRQ (extended interrupt requests) active on edge or level. These interrupt requests can be configured to act as a regular or fast interrupt.

63F09 clock is given by an external TTL clock running at 24 MHz. This clock cannot be modified without reconfiguration of internal PLL.