BAC 63F81

Friday 23 August 2024, by 63F09 // Peripherals

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DMC 63F41

Friday 23 August 2024, by 63F09 // Peripherals

DMC 63F41 is a level-1 direct mapped cache controller. It is not configurable.
Characteristics: full speed; direct mapped; write through; 64 KB of synchronous RAM; usable in SMP configuration as it contains a cache invalidation subsystem. Read more »

RAM 61F512

Friday 14 June 2024, by 63F09 // Peripherals

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ROM 27F512

Friday 14 June 2024, by 63F09 // Peripherals

System on chip contains a 64 Kbytes ROM between $FFFF0000 and $FFFFFFFF. Memory is created with RAM blocks in a read only configuration.
This ROM is hardcoded and initialized with memblcks.rpl. Read more »

MMU 63F29

Friday 14 June 2024, by 63F09 // Peripherals

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SPI 63F52

Friday 14 June 2024, by 63F09 // Peripherals

This controller acts as master or slave SPI device. External signals MISO MOSI SCLK CS (16 bits)
In slave mode, CS(0) is mandatory SS_n signal. In master mode, CS is used to address slaves’s chip select lines. This controller can directly drive 16 SPI slaves or more slave with an additional address decoder. Internal registers Registers Address Access 7 6 5 4 3 2 1 0 base + 0 when CC(0) = 0 read RX register write TX register base + 0 when CC(0) = 1 (…) Read more »

TWI (i2c) 63F54

Friday 14 June 2024, by 63F09 // Peripherals

Internal registers Registers Address Access 7 6 5 4 3 2 1 0 base + 0 read RX register write TX register base + 1 read Current start register (cleared when transaction begins) write Start register DC [1] DC DC soft reset stop after slave’s ack master ack read/not write start request base + 2 read/write Control register RX data ready TX empty RX IRQ enabled TX IRQ enabled ACK received ACK error busy 10 bits address base + 3 read Status register READY (…) Read more »

PTM 63F40

Friday 14 June 2024, by 63F09 // Peripherals

This programmable timer has been designed to be compatible with regular MC6840. Read more »

PIA 63F21

Friday 14 June 2024, by 63F09 // Peripherals

This component runs as a regular MC6821. Please note that 63F21 only contains half MC6821. Read more »

ACIA 63F50

Friday 14 June 2024, by 63F09 // Peripherals

This asynchronous serial interface has been designed to be compatible with regular MC6850. Read more »